Analog Computing's Second Act: Why AI Workloads Are Reviving a 1940s Idea

01The bit-shuffling tax: where digital AI chips waste energy

A modern AI accelerator spends most of its energy not on mathematics but on logistics. Every operation requires moving numbers — fetching weights from memory, shuttling activations between SRAM banks and multiply-accumulate arrays, writing results back. For small matrix multiplications, the data movement can consume an order of magnitude more energy than the arithmetic itself. The industry has responded with bigger caches, denser memory, and lower-voltage links, all of which treat the symptom while preserving the underlying approach.

The approach itself is the problem. Digital logic represents every number as a pattern of bits and evaluates logic gates to transform them. Precision is bought with bits, and each additional bit of precision multiplies the hardware and the energy bill. Yet most AI inference does not need perfect arithmetic: neural networks tolerate noise so well that quantization to 8-bit, 4-bit, or even lower precision often barely dents accuracy.

That tolerance is the opening. If the workload forgives imprecision, the cheapest possible computation is one that is only as precise as the task requires.

02How analog hardware computes with physics instead of bits

Analog computation abandons the bit pattern and lets a physical system do the work directly. Encode your inputs as voltages or currents, arrange the physics so that some natural law performs the transformation, and read the answer out as another measurable quantity. No instruction stream, no sequential gate evaluation: the computation happens all at once, in the continuous behavior of matter.

The idea is far older than the transistor. Analog computers plotted artillery trajectories and simulated aircraft dynamics in the 1930s and 1940s, and analog control circuits flew the Apollo missions when digital computers were still exotic. Digital won not because analog computing was impossible but because digital offered exactness, repeatability, and programmability at a moment when those properties outweighed efficiency for general-purpose work.

AI inference has a different profile than general-purpose work: one dominant operation, enormous volume, and generous error tolerance. That is close to the ideal customer profile for analog hardware.

03Ohm's law as a matrix multiplier

The flagship trick of modern analog AI hardware is crossbar multiplication. Arrange conductive devices — memristors, phase-change cells, or flash transistors — in a grid where each device's conductance encodes one weight of a neural network. Apply the input vector as voltages on the rows. Kirchhoff's current law sums the currents on each column automatically, and Ohm's law scales each contribution. The column currents are, physically and simultaneously, the matrix-vector product.

Every element of the multiplication happens in the same instant, in the same slab of silicon, with no data movement at all. The energy per operation approaches the physical minimum of the switching device itself — which is why laboratory crossbar demonstrations routinely report improvements of one to three orders of magnitude in energy per matrix multiply over digital accelerators.

The same physics that makes the computation free, however, makes it noisy: devices vary, currents drift with temperature, and the answer arrives only as accurately as the physical cells were written.

04The precision problem that killed analog the first time

Analog's historical weakness is that every answer inherits the imperfection of the hardware that computed it. Analog computers of the 1950s drifted as components aged and warmed, and two nominally identical machines gave slightly different answers. For ballistics and control, engineers bounded those errors and compensated. For scientific and business computing, exactness was worth more than efficiency, and digital hardware — riding Moore's law down the cost curve — took the entire market.

The noise has not gone away. Modern analog accelerators must fight device-to-device variability, limited precision when writing weights, thermal drift, and signal degradation in the peripheral circuitry. Published in-memory analog prototypes typically demonstrate effective precisions in the single-digit-bit range per cell. That is unusable for double-precision science and entirely acceptable for an 8-bit quantized neural network.

The workload, in other words, moved to meet the hardware. What killed analog computing in 1960 is survivable in 2026 — but only for the slice of computing that tolerates it.

05Mixed-signal chips: where analog quietly already won

The pure-analog endmember is not the only outcome that matters. The technology already in every phone and data center is mixed-signal: digital logic wrapped around analog primitives that do what they do best. Pixel sensors are analog. Radio front-ends are analog. The digital-to-analog converters in every audio path and the analog-natured sensing in every camera pipeline are computing with physics already, just inside a mostly digital envelope.

In-memory compute products now shipping embed analog-style arithmetic inside otherwise digital chips: the array performs the multiply-accumulate in the analog domain, and the result is digitized once at the boundary. This hybrid preserves programmability and interfaces while capturing most of the efficiency where it matters — the inner loop.

The pattern mirrors what happened to radio: software-defined architectures absorbed analog circuitry rather than eliminating it, and the same division of labor is forming in AI silicon.

06What an analog-accelerated AI stack would look like

The realistic near-term stack is not analog replacing digital but analog specializing inside it. Digital CPUs and GPUs retain training, orchestration, and anything requiring exact arithmetic. Analog or mixed-signal accelerators take the inference inner loop — matrix-vector products at quantized precision — where energy, not accuracy, is the binding constraint. Edge devices adopt first, because battery economics amplify every millijoule.

The obstacles are integration and trust, not physics. Device variability requires calibration schemes; drift requires periodic correction; and programming models must hide the hardware's messiness from developers who think in exact tensors. None of these is a law of nature. All of them are engineering, and engineering with an unusually strong economic tailwind given what data-center power budgets look like.

If analog acceleration matures, the 2020s will be the second time the industry discovered that the cheapest computer for a tolerant workload is the one where physics does the arithmetic. The first time, digital precision beat analog efficiency. This time, the workload chose differently.