RISC-V and the Open Chip Rebellion: Can Open Hardware Break the x86-Arm Duopoly

01 What an Open ISA Actually Promises

An instruction set architecture is the contract between silicon and software: the vocabulary of operations a chip understands. For four decades that contract has been controlled by two landlords. x86 belongs to Intel and AMD, and Arm belongs to Arm Holdings, and both extract license fees and royalties, and both decide who gets to build compatible hardware at all. That gatekeeping power shapes the entire industry: it is why so few companies design their own cores, and why a would-be chipmaker usually starts by negotiating rather than engineering.

RISC-V attacks the contract itself rather than the incumbents' products. It is a free and open standard instruction set architecture, based on reduced instruction set computer principles, whose specifications are released under permissive open-source licenses and can be implemented without paying royalties, as its Wikipedia entry summarizes. Anyone can download the specification, design a core around it, tape it out, and sell it. The openness applies to the ISA, not to chip designs: a RISC-V core can still be a proprietary blob, and most commercial ones are. What changes is who is allowed to compete, not how the winners behave once they do.

02 Why Embedded Devices and China Went First

The revolution did not start in phones or PCs. It started in the parts of computing nobody photographs: storage controllers, audio chips, keyboard controllers, sensor hubs, and microcontrollers buried inside cars and appliances. These devices run small, custom firmware rather than vast commercial software libraries, so the cost of switching ISAs is low and the royalty savings are pure margin. Industry announcements put cumulative RISC-V core shipments near ten billion by late 2023, overwhelmingly in these invisible slots.

Geopolitics accelerated the shift. United States export controls made proprietary Western chip technology a strategic risk, and Chinese firms responded by pouring resources into an ISA no one could revoke a license for. Alibaba's T-Head Xuantie cores became some of the most deployed RISC-V processors in the world, and Chinese silicon vendors, universities, and government programs converged on the standard as insurance against being cut off. For Beijing, open hardware is not ideology; it is supply-chain hedging. The same logic appeals to any company that has watched a licensing negotiation turn sour.

03 The Standardization Machine Behind the Slogan

An open ISA with no referee would fragment into dialects, so the governance story matters as much as the license. The RISC-V Foundation formed in 2015, reincorporated in Switzerland as RISC-V International in 2020 to keep the standard neutral ground, and has grown steadily since: publicly announced membership passed two thousand organizations in 2022, three thousand in 2023, and roughly four thousand across some seventy countries by 2024. Members span Google, Nvidia, Qualcomm, and every major Chinese silicon house, which is precisely the point: everyone funds a standard nobody owns.

The technical side matured in parallel. The base ISA is frozen, the vector extension (RVV 1.0) was ratified in 2021, and the RVA23 application profile, ratified in 2024, tells software vendors which extensions a standard Linux-class RISC-V chip must implement. Profiles are the anti-fragmentation device: they convert a menu of options into a contract. Without them, every vendor's core would be subtly incompatible and the software ecosystem would never consolidate.

04 Mobile: The Hardest Nut to Crack

Phone application processors are Arm's fortress, and the walls are made of software, not silicon. Android is built around the Arm architecture, every major mobile operating system, modem stack, GPU driver, and app store ecosystem assumes it, and a handset maker that switched ISAs would strand millions of apps overnight. Google has begun porting Android to RISC-V and accepting RISC-V targets in its toolchain, which is a genuine signal, but ports of this scale historically take the better part of a decade to reach shipping products. Royalty savings on a fifty-dollar SoC are real but modest; ecosystem risk is enormous. No top-tier phone ships a RISC-V application processor in 2026, and none is credibly rumored to.

The subtler angle is what happens inside the phone rather than as its brain. A modern handset contains a dozen small cores for sensors, security enclaves, and power management, and those invisible slots are quietly going open. RISC-V can hollow out Arm's periphery years before anyone contests Arm's core business. That is the same playbook embedded computing already ran, one royalty line at a time.

05 Automotive and AI Accelerators: The Real Wedge

Two markets are moving faster than phones. Automotive designs are long-lived, cost-sensitive, and increasingly software-defined, which makes a royalty-free, perpetually available ISA attractive to suppliers who must support a vehicle for fifteen years. Chinese electric vehicle makers in particular are adopting RISC-V microcontrollers across their electronics stacks, and western tier-one suppliers are evaluating it for the same margin reasons. Safety certification of RISC-V cores is now a real, purchasable product rather than a research project.

AI hardware is the more surprising front. Nvidia has said it will use RISC-V cores inside future GPUs for housekeeping and control logic, and startups like Tenstorrent, led by veteran chip architect Jim Keller, build entire AI accelerators around RISC-V compute tiles with an open instruction set as the integration contract. In big training clusters RISC-V is not displacing anything; it is mopping up the control-plane and data-movement jobs that surround the accelerator fabric. That is humble work, but it is how an ISA earns its way toward the center of the machine.

06 Fragmentation: Open Standard, Achilles Heel

The same openness that attracts adopters threatens to strand them. Any vendor can bolt proprietary extensions onto a RISC-V core, and history says some will: the embedded world is littered with near-standard chips whose one-off extensions made firmware unportable. Profiles and the frozen base ISA are the countermeasure, but compliance is encouraged more than enforced, and a large adopter with market power can still ship a dialect. The duopolies' deepest moat was never the license fee anyway; it is the decades of compilers, operating systems, drivers, and application binaries that assume x86 or Arm. RISC-V's toolchain is healthy for Linux workloads and thinner elsewhere, and that gap closes only as shipping volume gives developers a reason to care.

There is also a sober reading of the shipment numbers. Billions of cores sounds like victory until you notice they are mostly tiny, cheap, low-margin parts. Semico Research's widely cited forecast of roughly 62 billion cumulative RISC-V cores by 2030 would still be a minority of global core shipments, and almost all of it in the embedded tier. Volume is the beachhead, not the conquest.

07 Verdict: Erosion, Not Rupture

The honest answer to the headline question in 2026 is: not the duopoly as a whole, but a growing slice of it. RISC-V will keep taking embedded and microcontroller designs, expand in automotive electronics, ride along inside AI accelerators and GPUs, and take its first credible steps in laptops and industrial PCs, where Chinese vendors are already shipping RISC-V machines for government and enterprise buyers. What it will not do this decade is displace Arm in phone application processors or x86 in the client and server mainstream, because in those markets the ISA fee is a rounding error next to the software switching cost.

The rebellion still matters even at partial success. A credible third ISA caps licensing power the way a credible third mobile platform would have: it changes negotiations that never appear on a price list. Every semiconductor buyer now has a walk-away option, and the incumbents know it. Jeff Geerling's recent field report, embedded below, walks through this exact terrain on real dev boards, and his mid-size-creator vantage is a useful corrective to both the hype and the dismissal: the boards work, the toolchain works, and the distance to a mainstream phone or laptop is still measured in years. Open hardware wins by attrition, and attrition is proceeding on schedule.