The Smartphone System on a Chip: How Mobile Chips Keep Getting Faster

01 One Chip to Run Everything

Open a modern phone and the most important component is not the screen or the battery. It is a fingernail-sized square of silicon that contains nearly the entire computer. The system on a chip (SoC) is an integrated circuit that combines the central processing unit, graphics processing unit, memory controller, modem, image signal processor and an ever-growing pile of specialized accelerators onto a single die. Wikipedia's summary of the concept is direct: an SoC "combines most or all key components of a computer or electronic system onto a single microchip," including the CPU, memory control, input/output, and optional features like a GPU, Wi-Fi connectivity and radio-frequency processing.

That integration is not a convenience. It is the reason a phone can do laptop-class work on a battery. Every millimeter of wire between two chips costs both power and time, and a phone has no room for separate packages anyway. Folding everything onto one die shortens the wires, shrinks the package, and lets the chip's power management shut whole blocks down when they are idle.

The video below from Branch Education is the definitive on-topic explainer for how these chips are laid out. One note for our usual threshold: its observed view count sits below the 3 million mark we normally require for feature videos, but it is the clearest visual walkthrough of SoC internals available, so we are featuring it.

02 The Cast of Cores

A 2026 flagship SoC is less a processor than a small city, with distinct districts that only talk to each other over controlled routes:

The CPU complex. No flagship ships a homogeneous CPU anymore. Instead you get a big.LITTLE arrangement: prime cores for burst performance, performance cores for sustained load, and efficiency cores that sip power for background work. The 2026 generation, including the Snapdragon 8 Elite Gen 5 and Dimensity 9500, pushes prime cores past 4 GHz on phones, a number that desktop chips owned for years.

The GPU. Still the traditional second citizen in name, but mobile GPUs now drive 120 Hz displays at resolutions that were flagship-monitor territory a decade ago, and increasingly run the integer and sparse workloads that on-device models need for rasterization and upscaling.

The modem. Integrated on the die for most vendors, handling 5G carrier aggregation across dozens of bands. Apple's modem is the notable latecomer here, having only recently begun replacing Qualcomm silicon.

The ISP. The image signal processor is the reason photos look the way they do. It takes raw sensor data and performs demosaicing, noise reduction, tone mapping, and face and scene detection, all before the photo ever hits storage. Google's Pixels have leaned on this block for years.

The NPU. The newest headline core, and the reason chips are marketed by a metric most people had never heard of five years ago: TOPS, or trillions of operations per second.

03 The NPU and the On-Device AI Shift

For most of smartphone history, the marketing order was clear: CPU clock speed, then GPU, then everything else. In 2026 that order has inverted. The neural processing unit is now the core the chip is named after, because the NPU is where on-device AI actually lives.

Running a large language model or an image generator on a phone means doing billions of multiply-accumulate operations per second, on integer or low-precision formats, at power levels a battery can sustain. NPUs are built for exactly that shape of workload, and their claimed throughput has climbed absurdly:

Qualcomm's flagship line tells the story. The Snapdragon 855 in 2018 claimed roughly 3 TOPS of NPU throughput. The 8 Gen 2 in late 2022 claimed 45 TOPS, and the 8 Elite in late 2024 claimed 80 TOPS. The Snapdragon 8 Elite Gen 5, launched for 2026 devices, claims 320 TOPS across a new NPU architecture — more than a hundredfold improvement in eight years, and Qualcomm is explicit that the design target was running generative AI models locally.

04 Process Nodes and the Physics of Shrinking

All of this is downstream of one unglamorous number: the manufacturing process node. The "node" is shorthand for the generation of photolithography used to print the transistors, and the industry's progression — 28nm in 2011, down through 7nm in 2018, 4nm in 2022, 3nm in 2024, and now the 2nm class entering high-volume production for 2026 — has been the engine under every other improvement.

Shrinking matters for an unforgiving reason. Power draw in a digital circuit scales with capacitance, and capacitance scales with area. Halve the transistor, and the same operation costs less energy, or you can do twice as many operations for the same energy. That is why a 2026 flagship phone runs circles around a 2011 one while its battery lasts longer.

The physics is getting hostile. Below 3nm the features being printed are smaller than the wavelength of the light used, so manufacturers rely on extreme ultraviolet lithography and increasingly on gate-all-around transistor structures, where the gate wraps the channel on all sides to keep the current flowing predictable. The 2nm generation debuting in 2026 flagship silicon, from both TSMC's N2 and Samsung's SF2 processes, is the first mass-production generation built on those wrapped-gate transistors.

It is also getting brutally expensive. A 2nm wafer costs several times what a 28nm wafer did, and only a handful of companies can pay for leading-edge capacity. That cost pressure is why even Apple and Google design their own chips but fabricate them at TSMC, and why the SoC is the single most expensive component in a modern phone.

05 The 2026 Flagship Generation, Compared

The generation shipping in 2026 phones, read side by side, shows where every vendor thinks the next five years are going.

Snapdragon 8 Elite Gen 5 (Qualcomm). The headline is the 320-TOPS NPU and custom Oryon-derived CPU cores. Qualcomm's pitch is that the phone is now the primary AI computer, with the NPU large enough to run large language models locally without a network round-trip.

Dimensity 9500 (MediaTek). MediaTek's flagship has closed nearly all of its historical gap with Qualcomm, with an aggressive NPU of its own and a 3nm-class process. The story here is that the flagship SoC market has real competition again, and vendors building Android phones can genuinely choose.

A19 Pro (Apple). Apple's line continues to pair industry-leading single-core CPU performance with a large NPU and tight software integration, on the 3nm-class process generation with 2nm silicon expected in the following cycle. Apple's lead is now more architectural than process-based.

Tensor G6 (Google). The outlier. Google's chip does not chase peak CPU or GPU benchmarks, and its NPU is modest next to Qualcomm's claimed numbers. Its entire design philosophy is different: Tensor exists to run Google's specific AI models on-device, and the Pixel 11 generation pairs it with the Gemini Intelligence framework Google is shipping across its 2026 phones.

What unites them is the direction. Every vendor's headline metric for 2026 is NPU throughput, not CPU clock or GPU frames. The chip generation's purpose has shifted from making apps faster to making models run locally.

06 What It Means for the Phone in Your Pocket

The practical consequences of all this are less abstract than the spec sheets suggest.

Battery life keeps improving without bigger batteries. The efficiency gains from process shrinks get reinvested, partly in sustained performance and partly in headroom for the NPU to run without the phone becoming a hand warmer.

Features move from cloud to device. Real-time translation, photo editing by text prompt, and voice assistants that keep working in airplane mode are all downstream of a large-enough NPU. They are also better for privacy when the data never leaves the phone.

Software support windows keep stretching. A chip with enough NPU headroom can receive AI features for years after purchase, which is part of why 2026 flagships ship with seven-year software promises.

Phones are getting more expensive, not less. Leading-edge silicon is the single biggest line item in a flagship bill of materials, and it is not shrinking. The 2nm generation will cost meaningfully more per chip than 3nm did, and that is showing up in launch prices across the industry.

The system-on-chip began as a packaging convenience. In 2026 it is the whole computer, and the fight among vendors is over which block gets the biggest slice of the die. Right now the NPU is winning, and by a margin that would have been unthinkable when a phone's main job was running apps.